Semiconductor IP

Semiconductor IP

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1
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Interface/Connectivity IP: USB Host/Device Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
2
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Interface/Connectivity IP: Ethernet Media Access Controller(10/100Mbps)
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
3
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Interface/Connectivity IP: Gigabit Ethernet Media Access Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
4
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Memory Controller IP: Static Memory Controller (SRAM/NOR/eMMC)
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
5
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Memory Controller IP: Direct Memory Access Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
6
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Memory Controller IP: SD Host Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
7
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
System/Peripheral IP: General Purpose Input-Output Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
8
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
System/Peripheral IP: Serial Peripheral Interface Master Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
9
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Processor IP: VEGA ET1031: 32-bit Microprocessor
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
10
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Processor IP: VEGA AS1061: 64-bit Microprocessor
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
11
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Processor IP: VEGA AS1161: 64-bit Microprocessor
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
12
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Processor IP: VEGA AS2161: 64-bit Microprocessor
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
13
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Processor IP: VEGA AS4161: 64-bit Microprocessor
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
14
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Processor IP: VEGA AT1051: 32-bit Microprocessor
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
16
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Basic Function IP: Timer
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
17
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Basic Function IP: UART
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
18
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Basic Function IP: Platform Level Interrupt Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
19
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Basic Function IP: Inter-Integrated Circuit Master Controller
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
20
Provider Name: CDAC-TVM
IP Type: Soft IP
Support:vega[at]cdac[dot]in
Basic Function IP: Pulse Width Modulator
Maturity Level: Silicon Proven
Provided with core: Design Files, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: N/A
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
21
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Standard Bus IP: AXI4 Cross-bar Interconnect
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: Datasheets: Interconnect
22
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Processor IP: Chromite Core Generator
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: Datasheets: Chromite, Azurite
23
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Processor IP: Azurite Core Generator
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model, Supported Drivers
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: Datasheets: Chromite, Azurite
24
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Security IP: AES[128/192/256]
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: N/A
25
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Security IP: SHA[256/512]
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: N/A
26
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Security IP: RSA
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: N/A
27
Provider Name: Incore Semiconductors
IP Type: Soft IP
Support:madhu[at]incoresemi[dot]com
Security IP: ECC
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench, Constraint File, Simulation Model
Tested design flows: Design Entry, Simulation & Verification, Synthesis, Benchmarks & Performance
Technical Documents: N/A
28
Provider Name: CDAC-Hyderabad
IP Type: Verification IP
Support:anoopkr[at]cdac[dot]in
Verification IP: CCI(Cache Coherrant Interconnect)
Maturity Level: Product
Provided with core: Test Bench
Tested design flows: Simulation & Verification
Technical Documents: User Guides
29
Provider Name: CDAC-Hyderabad
IP Type: Verification IP
Support:anoopkr[at]cdac[dot]in
Verification IP: SD Host Controller
Maturity Level: Product
Provided with core: Test Bench
Tested design flows: Simulation & Verification
Technical Documents: User Guides
30
Provider Name: MosChip Technologies Public Limited
IP Type:Soft IP
Support:sales[at]moschip[dot]com
Analog IP:Power Management
Maturity Level:Prototype
Provided with core: Design Files,Example Designs,Test Bench,Simulation Tool
Tested design flows: Simulation & Verification
Technical Documents: Release Notes & Known Issues,DataSheets,User Guides
31
Provider Name: MosChip Technologies Public Limited
IP Type:Soft IP
Support:sales[at]moschip[dot]com
Analog IP:Clock Management
Maturity Level:Prototype
Provided with core: Design Files,Example Designs,Test Bench,Simulation Tool
Tested design flows: Simulation & Verification
Technical Documents: Release Notes & Known Issues,DataSheets,User Guides
32
Provider Name: MosChip Technologies Public Limited
IP Type:Soft IP
Support:sales[at]moschip[dot]com
Analog IP:LCD Panel Controller
Maturity Level:Prototype
Provided with core: Design Files,Example Designs,Test Bench,Simulation Tool
Tested design flows: Simulation & Verification
Technical Documents: Release Notes & Known Issues,DataSheets,User Guides
33
Provider Name: MosChip Technologies Public Limited
IP Type:Soft IP
Support:sales[at]moschip[dot]com
Analog IP:Temperature Sensor
Maturity Level:Prototype
Provided with core: Design Files,Example Designs,Test Bench,Simulation Tool
Tested design flows: Simulation & Verification
Technical Documents: Release Notes & Known Issues,DataSheets,User Guides
34
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP: PCIe Gen 1 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
35
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP: PCIe Gen 1 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
36
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP: PCIe Gen 2 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
37
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP: PCIe Gen 2 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
38
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 3 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
39
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 3 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
40
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 4 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
41
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 4 EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
42
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 5 EP/RC/ DM
Maturity Level: Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
43
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 5 EP/RC/ DM
Maturity Level: Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
44
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 6 EP/RC/ DM
Maturity Level: Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
45
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 6 EP/RC/ DM
Maturity Level: Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
46
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 7 EP/RC/ DM
Maturity Level: Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
47
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIe Gen 7 EP/RC/ DM
Maturity Level: Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
48
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:CXL V1.x EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
49
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:CXL V1.x EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
50
Provider Name:PRIMESOC Technologies
IP Type: Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:CXL V2.x EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
51
Provider Name:PRIMESOC Technologies
IP Type: Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:CXL V2.x EP/RC/ DM
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
52
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:CXL V3.x EP/RC/ DM
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
53
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:CXL V3.x EP/RC/ DM
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
54
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:UCIe 1.x EP/RC/ DM
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
55
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:UCIe 1.x EP/RC/ DM
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
56
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIE Retimer Gen4/5/6/7
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
57
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIE Retimer Gen4/5/6/7
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
58
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIE Switch G1/2/3/4/5/6/7
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
59
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Interface/Connectivity IP:PCIE Switch G1/2/3/4/5/6/7
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
60
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Audio,Video & Image Processing IP:MIPI CSI TX/RX
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
61
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Audio,Video & Image Processing IP:MIPI CSI TX/RX
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
62
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Audio,Video & Image Processing IP:MIPI DSI TX/RX
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
63
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Audio,Video & Image Processing IP:MIPI DSI TX/RX
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
64
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Standerd Bus IP: AXI4 Memory map
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
65
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Standerd Bus IP:AXI4 Memory map
Maturity Level:Others
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
66
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Standard Bus IP:AXI4 Stream
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
67
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Standard Bus IP:AXI4 Stream
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
68
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Standard Bus IP:APB
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
69
Provider Name:PRIMESOC Technologies
IP Type:Verification IP
Support:ijd[at]primesoctechnologies[dot]com
Standard Bus IP:APB
Maturity Level: Prototype
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance,Supported Device,Tools
Technical Documents: Release Notes & Known Issues, Datasheets, User Guides
70
Provider Name:PRIMESOC Technologies
IP Type:Soft IP
Support:ijd[at]primesoctechnologies[dot]com
Security IP: AES_GCM
Maturity Level: FPGA Prototypes Available
Provided with core: Design Files, Example Designs, Test Bench,Constraint File, Simulation Model
Tested design flows: Design Entry,Simulation & Veriifcation,Synthesis,Benchmarks & Performance

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