Semiconductors are at the heart of all electronic products and constitute a significant share in the Bill of Material (BOM). The National Policy on Electronics 2019 aims to position India as a global hub for Electronics System Design and Manufacturing (ESDM)
and envisions creation of a vibrant semiconductor chip design ecosystem in the country. With an exceptional talent pool of 20% of world's semiconductor design engineers and thousands of chips designed by them every year in the country, India is poised for growth to achieve self-reliance and technology leadership in semiconductor design sector.
Ministry of Electronics and Information technology has announced the Design Linked Incentive (DLI) Scheme to offset the disabilities in the domestic industry involved in semiconductor design in order to not only move up in value-chain but also strengthen the semiconductor chip design ecosystem in the country. CDAC is responsible for implementation of the DLI Scheme as Nodal Agency.
The Design Linked Incentive (DLI) Scheme aims to offer financial incentives as well as design infrastructure support across various stages of development and deployment of semiconductor design(s) for Integrated Circuits (ICs), Chipsets, System on Chips (SoCs), Systems & IP Cores and semiconductor linked design(s) over a period of 5 years.
Financial incentives and design infrastructure support will be extended to domestic companies, Startups and MSMEs engaged in semiconductor design or semiconductor linked design. The approved applicants that claim incentives under the scheme shall retain their domestic status (i.e. more than 50% of the capital in it is beneficially owned by resident Indian citizens and/ or Indian companies, which are ultimately owned and controlled by resident Indian citizens) for a period of three years after claiming incentives under the scheme. An applicant must meet the Threshold and Ceiling Limit to be eligible for disbursement of incentive as indicated here (Threshold and Ceiling Limits).
In accordance with Para 4 of the Scheme, the Application Window shall be initially three (3) years from 01-01-2022.
Semiconductor design for Integrated Circuits (ICs), Chipsets, System on Chips (SoCs), Systems & IP Cores and semiconductor linked design.